This invention relates to semiconductor memory circuits.
Recently, various improvements have been made on MOS semiconductor memory devices for the purposes of realizing high integration density and high operation speed and also realizing systems using a single power supply. For a system using a single power supply, it is usual practice to form an on-chip substrate bias circuit on a substrate on which a memory circuit is also formed. Such an on-chip substrate bias circuit includes an oscillator driven by the output voltage from a single power supply and a rectifier for rectifying an oscillation output signal from the oscillator and for supplying a bias voltage of a predetermined level, for instance -2 V, to the substrate,
However, the conduction capacity of the rectifier is generally not so large, and sometimes it cannot permit charges flowing from the memory into the substrate at the time of operation of the memory to be entirely drained to ground. In such a case, floating charges remaining in the substrate cause fluctuations of the substrate potential. In a memory device using the on-chip substrate bias circuit, component elements such as decoders and bit lines are capacitively coupled to the substrate, so that there arises the problem of substrate potential fluctuations with potential variations in the decoders and bit lines. Particularly, in dynamic random access memories, the substrate potential fluctuations caused with potential variations in bit lines due to the capacitive coupling between the bit lines and the substrate have noticeable influence upon the memory operation.